This invention relates to integrated circuits, and more particularly, to memory elements in integrated circuits.
Integrated circuits often contain memory elements. Memory elements may be based on cross-coupled inverters and may be used to store data. Each memory element may store a single bit of data.
Memory elements are often arranged in arrays. In a typical array, data lines are used to write data into the memory elements and are used to read data from memory elements that have been loaded with data. Address lines may be used to select which of the memory elements are being accessed. In some arrangements, clear lines are used to clear the memory elements. It may be advantageous to clear a memory array just prior to loading the array with data, as this places each of the memory elements in the array in a known state.
In modern integrated circuit designs, care must be taken to design memory element cells so that they consume relatively small amounts of circuit real estate. At the same time, memory elements must be designed so that operations on the memory elements can be performed reliably. These design requirements sometimes pose challenges for a circuit designer. For example, to ensure that clear operations are performed reliably, it may be desirable to provide a memory element with relatively large clear transistors. Making the clear transistors strong helps to ensure that clear signals can be driven into the memory element cells, regardless of their previous content. At the same time, use of overly-large clear transistors may consume undesirably large amounts of real estate on an integrated circuit.
It would therefore be desirable to provide improved ways in which to clear data from integrated circuit memory elements.